Guarded page tables on Mips R4600 or an exercise in architecture-dependent micro optimization

Authors:
Jochen Liedtke;Kevin Elphinstone
Affiliations:
GMD - German National Research, Center for Information Technology;School of Computer Science, University of New South Wales
Venue:
ACM SIGOPS Operating Systems Review
Year:
1996

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Abstract

Guarded Page Tables implement huge sparsely occupied address spaces efficiently and have the advantages of multi-level tables (tree structure, hierarchy, sharing). We present an implementation guarded page tables on the R4600 processor. The paper describes both the architecture-dependent design process of the algorithms and the resulting tool box.