A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Efficient Identification and Signatures for Smart Cards
CRYPTO '89 Proceedings of the 9th Annual International Cryptology Conference on Advances in Cryptology
Efficient Elliptic Curve Exponentiation Using Mixed Coordinates
ASIACRYPT '98 Proceedings of the International Conference on the Theory and Applications of Cryptology and Information Security: Advances in Cryptology
ASIC-Hardware-Focused Comparison for Hash Functions MD5, RIPEMD-160, and SHS
ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume I - Volume 01
Security Extension for IEEE Std 1149.1
Journal of Electronic Testing: Theory and Applications
ICPPW '06 Proceedings of the 2006 International Conference Workshops on Parallel Processing
Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding
IOLTS '06 Proceedings of the 12th IEEE International Symposium on On-Line Testing
New Methods for Digital Generation and Postprocessing of Random Data
IEEE Transactions on Computers
Elliptic-Curve-Based Security Processor for RFID
IEEE Transactions on Computers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Design & Test
Faster addition and doubling on elliptic curves
ASIACRYPT'07 Proceedings of the Advances in Crypotology 13th international conference on Theory and application of cryptology and information security
Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects
Proceedings of the Conference on Design, Automation and Test in Europe
JTAG Security System Based on Credentials
Journal of Electronic Testing: Theory and Applications
An ECDSA pocessor for RFID athentication
RFIDSec'10 Proceedings of the 6th international conference on Radio frequency identification: security and privacy issues
Tampering with motes: real-world physical attacks on wireless sensor networks
SPC'06 Proceedings of the Third international conference on Security in Pervasive Computing
Multi-level secure JTAG architecture
IOLTS '11 Proceedings of the 2011 IEEE 17th International On-Line Testing Symposium
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The standard IEEE 1149.1 (Test Access Port and Boundary-Scan Architecture, also known as JTAG port) provides a useful interface for embedded systems development, debug, and test. In an 1149.1-compatible integrated circuit, the JTAG port allows the circuit to be easily accessed from the external world, and even to control and observe the internal scan chains of the circuit. However, the JTAG port can be also exploited by attackers to mount several cryptographic attacks. In this paper we propose a novel architecture that implements a secure JTAG interface. Our JTAG scheme allows for mutual authentication between the device and the tester. In contrast to previous work, our scheme uses provably secure asymmetric-key based authentication and verification protocols. The complete scheme is implemented in hardware and integrated with the standard JTAG interface. Detailed area and timing results are also presented.