The Montgomery Inverse and Its Applications
IEEE Transactions on Computers
Improved Elliptic Curve Multiplication Methods Resistant against Side Channel Attacks
INDOCRYPT '02 Proceedings of the Third International Conference on Cryptology: Progress in Cryptology
Weierstraß Elliptic Curves and Side-Channel Attacks
PKC '02 Proceedings of the 5th International Workshop on Practice and Theory in Public Key Cryptosystems: Public Key Cryptography
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Montgomery Exponentiation with no Final Subtractions: Improved Results
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
The Montgomery Powering Ladder
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Low-Power Design for an Elliptic Curve Digital Signature Chip
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Scalable Dual-Field Elliptic Curve Cryptographic Processor
IEEE Transactions on Computers
Elliptic-Curve-Based Security Processor for RFID
IEEE Transactions on Computers
Attacking ECDSA-Enabled RFID Devices
ACNS '09 Proceedings of the 7th International Conference on Applied Cryptography and Network Security
ECC Is Ready for RFID --- A Proof in Silicon
Selected Areas in Cryptography
Securing the Elliptic Curve Montgomery Ladder against Fault Attacks
FDTC '09 Proceedings of the 2009 Workshop on Fault Diagnosis and Tolerance in Cryptography
A compact architecture for montgomery elliptic curve scalar multiplication processor
WISA'07 Proceedings of the 8th international conference on Information security applications
Low-Cost elliptic curve cryptography for wireless sensor networks
ESAS'06 Proceedings of the Third European conference on Security and Privacy in Ad-Hoc and Sensor Networks
Low-resource hardware design of an elliptic curve processor for contactless devices
WISA'10 Proceedings of the 11th international conference on Information security applications
A cryptographic processor for low-resource devices: canning ECDSA and AES like sardines
WISTP'11 Proceedings of the 5th IFIP WG 11.2 international conference on Information security theory and practice: security and privacy of mobile devices in wireless communication
Extending ECC-based RFID authentication protocols to privacy-preserving multi-party grouping proofs
Personal and Ubiquitous Computing
Evaluating 16-bit processors for elliptic curve cryptography
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
A hardware processor supporting elliptic curve cryptography for less than 9 kGEs
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Exploring the design space of prime field vs. binary field ECC-Hardware implementations
NordSec'11 Proceedings of the 16th Nordic conference on Information Security Technology for Applications
Secure JTAG Implementation Using Schnorr Protocol
Journal of Electronic Testing: Theory and Applications
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In the last few years, a lot of research has been made to bring asymmetric cryptography on low-cost RFID tags. Many of the proposed implementations include elliptic-curve based coprocessors to provide entity-authentication services through for example identification schemes. This paper presents first results of an 192-bit Elliptic Curve Digital Signature Algorithm (ECDSA) processor that allows both entity and also message authentication by digitally signing challenges from a reader. The proposed architecture enhances the state-of-the-art in designing a low-resource ECDSA-enabled RFID hardware implementation. A tiny microcontroller is integrated to provide protocol scalability and re-use of common algorithms. The proposed processor signs a message within 859 188 clock cycles (127 ms at 6.78MHz) and has a total chip size of 19 115 gate equivalents.