Exploring the design space of prime field vs. binary field ECC-Hardware implementations

  • Authors:
  • Erich Wenger;Michael Hutter

  • Affiliations:
  • Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria;Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria

  • Venue:
  • NordSec'11 Proceedings of the 16th Nordic conference on Information Security Technology for Applications
  • Year:
  • 2011

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Abstract

In this paper, we answer the question whether binary extension field or prime-field based processors doing multi-precision arithmetic are better in the terms of area, speed, power, and energy. This is done by implementing and optimizing two distinct custom-made 16-bit processor designs and comparing our solutions on different abstraction levels: finite-field arithmetic, elliptic-curve operations, and on protocol level by implementing the Elliptic Curve Digital Signature Algorithm (ECDSA). On the one hand, our $\mathbb{F}_{2^{m}}$ based processor outperforms the $\mathbb{F}_p$ based processor by 19.7% in area, 69.6% in runtime, 15.9% in power, and 74.4% in energy when performing a point multiplication. On the other hand, our $\mathbb{F}_p$ based processor (11.6kGE, 41.4,μ W, 1,313kCycles, and 54.3μ J) improves the state-of-the-art in $\mathbb{F}_{p_{192}}$ ECC hardware implementations regarding area, power, and energy results. After extending the designs for ECDSA (signature generation and verification), the area and power-consumption advantages of the $\mathbb{F}_{2^{m}}$ based processor vanish, but it still is 1.5-2.8 times better in terms of energy and runtime.