False-Path Removal Using Delay Fault Simulation
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
9.3 Improving Path Delay Fault Testability by Path Removal
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Test generation for clock-domain crossing faults in integrated circuits
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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