Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
A new partitioning method for parallel simulation of VLSI circuits on transistor level
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Fast circuit simulation on graphics processing units
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Circuit Simulation
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The need for detailed simulation of integrated circuits has received significant attention since the early stages of design automation. Given the increasing device integration, these simulations have extreme memory footprints, especially within unified memory hierarchies. This paper overcomes the infeasible memory demands of modern circuit simulators. Structural partitioning of the netlist and temporal partitioning of the input signals allow distributed execution with minimal memory requirements. The proposed framework is validated with simulations of a circuit with more than 106 MOSFET devices. In comparison to a commercial tool, we observe minimal error and even x2.35 speedup for moderate netlist sizes. The proposed framework is proven highly reusable across a variety of execution platforms.