Vision Chips
Digital Image Processing
An Architecture for Fault-Tolerant Computation with Stochastic Logic
IEEE Transactions on Computers
Using stochastic computing to implement digital image processing algorithms
ICCD '11 Proceedings of the 2011 IEEE 29th International Conference on Computer Design
The JPEG2000 still image coding system: an overview
IEEE Transactions on Consumer Electronics
Delayed Stochastic Decoding of LDPC Codes
IEEE Transactions on Signal Processing
High Fault Tolerant Image Processing System Based on Stochastic Computing
CSSS '12 Proceedings of the 2012 International Conference on Computer Science and Service System
A spectral transform approach to stochastic circuits
ICCD '12 Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012)
Survey of Stochastic Computing
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
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Real-time image-processing applications impose severe design constraints in terms of area and power. Examples of interest include retinal implants for vision restoration and on-the-fly feature extraction. This work addresses the design of image-processing circuits using stochastic computing techniques. We show how stochastic circuits can be integrated at the pixel level with image sensors, thus supporting efficient real-time (pre)processing of images. We present the design of several representative circuits, which demonstrate that stochastic designs can be significantly smaller, faster, more power-efficient, and more noise-tolerant than conventional ones. Furthermore, the stochastic designs naturally produce images with progressive quality improvement.