Self-timed rings and their application to division
Self-timed rings and their application to division
Analog Integrated Circuits and Signal Processing - Special issue: low-voltage low-power analog integrated circuits
Analog VLSI: Circuits and Principles
Analog VLSI: Circuits and Principles
How to Achieve Worst-Case Performance
ASYNC '01 Proceedings of the 7th International Symposium on Asynchronous Circuits and Systems
ASYNC '02 Proceedings of the 8th International Symposium on Asynchronus Circuits and Systems
Computer Architecture: A Quantitative Approach
Computer Architecture: A Quantitative Approach
Ultralow-voltage, minimum-energy CMOS
IBM Journal of Research and Development - Advanced silicon technology
The design of high-performance dynamic asynchronous pipelines: high-capacity style
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Circuit techniques for dynamic variation tolerance
Proceedings of the 46th Annual Design Automation Conference
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Statistical analysis of computations per unit energy in processors over the last 30 years is given that illustrates a sharp reduction in the rate of energy efficiency improvements over the last several years resulting in the formation of an asymptotic "wall" with our dataset; we use the measure of giga multiply accumulates per Joule. We have developed an energy model which takes into account the realities of scaling, specifically for asynchronous systems. Studies of an energy efficient asynchronous pipeline show fabricated results of 17 Giga Operations per Joule in 0.6 µm at subthreshold when fully pipelined, and simulations at a more modern 65 nm process show a further order of magnitude improvement on that.