Efficient variation-aware EM-semiconductor coupled solver for the TSV structures in 3D IC

Authors:
Yuanzhe Xu;Wenjian Yu;Quan Chen;Lijun Jiang;Ngai Wong
Affiliations:
The University of Hong Kong, Hong Kong;Tsinghua University, Beijing, China;The University of Hong Kong, Hong Kong;The University of Hong Kong, Hong Kong;The University of Hong Kong, Hong Kong
Venue:
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2012

Citing 9
Cited 0

A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology

Proceedings of the conference on Design, automation and test in Europe
Variational capacitance extraction of on-chip interconnects based on continuous surface model

Proceedings of the 46th Annual Design Automation Conference
An efficient resistance sensitivity extraction algorithm for conductors of arbitrary shapes

Proceedings of the 46th Annual Design Automation Conference
Robust simulation methodology for surface-roughness loss in interconnect and package modelings

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model

Proceedings of the 16th Asia and South Pacific Design Automation Conference
Three Dimensional System Integration: IC Stacking Process and Design

Three Dimensional System Integration: IC Stacking Process and Design
Strategy for electromagnetic interconnect modeling

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electromagnetic interconnects and passives modeling: software implementation issues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Effective Formulation of Coupled Electromagnetic-TCAD Simulation for Extremely High Frequency Onward

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

In this paper, we present a variational electromagnetic-semiconductor coupled solver to assess the impacts of process variations on the 3D integrated circuit (3D IC) on-chip structures. The solver employs the finite volume method (FVM) to handle a system of equation considering both the full-wave electromagnetic effects and semiconductor effects. With a smart geometrical variation model for the FVM discretization, the solver is able to handle both small-size or large-size variations. Moreover, a weighted principle factor analysis (wPFA) technique is presented to reduce the random variables in both electromagnetic and semiconductor regions, and the spectral stochastic collocation method (SSCM) [10] is used to generate the quadratic statistical model. Numerical results validate the accuracy and efficiency of this solver in dealing with process variations in hybrid material through-silicon via (TSV) structures.