Implementation of correlation power analysis attack on an FPGA DES design

Authors:
Jun Yang;Weiwei Shan;Junyin Liu;Huafang Sun
Affiliations:
National ASIC System Engineering Center, Southeast University, Nanjing, 210096, China;National ASIC System Engineering Center, Southeast University, Nanjing, 210096, China;National ASIC System Engineering Center, Southeast University, Nanjing, 210096, China;National ASIC System Engineering Center, Southeast University, Nanjing, 210096, China
Venue:
International Journal of Information and Communication Technology
Year:
2013

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Abstract

Differential power analysis DPA has become a great threat to cryptographic chips as an important side channel attack. But it is still not easy to put attacks on encryption algorithm with FPGA implementation. In this paper, a data encryption standard DES algorithm is implemented on a FPGA. Then an experimental platform of DPA for FPGA implementation is built with verified feasibility. Experimental results for correlation-based DPA attack on the DES hardware implementation show that our DPA experimental platform is effective in realising the DPA attack on hardware implementation of cryptographic algorithms.