Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture
IEEE Transactions on Computers
Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Ozone (O3): An Out-of-Order Flash Memory Controller Architecture
IEEE Transactions on Computers
A multi-controller design for solid-state drives
Proceedings of the 2012 ACM Research in Applied Computation Symposium
A multi-controller architecture for high-performance solid-state drives
ACM SIGAPP Applied Computing Review
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NAND ash memory has advanced along with the wave of consumer electronics and embedded systems, because of its advantages of non-volatility, lower-power consumption, faster access, and shock-resistance. Recently, SSDs (Solid-State Drives) which use NAND flash memory have replaced HDDs (Hard-Disk Drives) in many applications. However, NAND flash memory that has special characteristics (e.g., asymmetrical operations, out-of-place updates, and erase limitation) could have performance impacts on SSDs. Currently, the internal architecture of a SSD needs multiple controllers to handle and manage NAND flash chips. However, one controller is in charge of some specific NAND flash chips on its own bus and can't access other NAND flash chips that owned by other controllers. We call the situation as the bus constraint. The bus constraint will reduce the controllers' execution parallelism when multiple requests will access the chips on the same bus. To overcome the problem, we will propose a parallel multi-controller design (PMCD) in the paper. We will implement PMCD and the traditional multi-controller design (TMCD) on an FPGA-based development board (i.e., Altera DE2). According to our experimental results, PMCD can increase about 27.3% performance when compared to TMCD, and the overhead is acceptable.