Towards verifying VHDL descriptions of processors

  • Authors:
  • Laurent Arditi;Hélène Collavizza

  • Affiliations:
  • Université de Nice, Sophia Antipolis, 13S, CNRS-URA 1376;Université de Nice, Sophia Antipolis, 13S, CNRS-URA 1376

  • Venue:
  • EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
  • Year:
  • 1995

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Abstract