Quantum computation and quantum information
Quantum computation and quantum information
Fast parallel circuits for the quantum Fourier transform
FOCS '00 Proceedings of the 41st Annual Symposium on Foundations of Computer Science
Classical and Quantum Computation
Classical and Quantum Computation
Algorithms for quantum computation: discrete logarithms and factoring
SFCS '94 Proceedings of the 35th Annual Symposium on Foundations of Computer Science
Parallelizing quantum circuits
Theoretical Computer Science
A fault tolerant, area efficient architecture for Shor's factoring algorithm
Proceedings of the 36th annual international symposium on Computer architecture
Computational depth complexity of measurement-based quantum computation
TQC'10 Proceedings of the 5th conference on Theory of quantum computation, communication, and cryptography
Quantum addition circuits and unbounded fan-out
Quantum Information & Computation
A quantum circuit for shor's factoring algorithm using 2n + 2 qubits
Quantum Information & Computation
A linear-size quantum circuit for addition with no ancillary qubits
Quantum Information & Computation
Implementation of Shor's algorithm on a linear nearest neighbour qubit array
Quantum Information & Computation
A logarithmic-depth quantum carry-lookahead adder
Quantum Information & Computation
Constructing arbitrary steane code single logical qubit fault-tolerant gates
Quantum Information & Computation
Depth efficient neural networks for division and related problems
IEEE Transactions on Information Theory
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We contribute a 2D nearest-neighbor quantum architecture for Shor's algorithm to factor an n-bit number in O(log3 n) depth. Our implementation uses parallel phase estimation, constant-depth fanout and teleportation, and constant-depth carry-save modular addition. We derive upper bounds on the circuit resources of our architecture under a new 2D model which allows a classical controller and parallel, communicating modules. We provide a comparison to all previous nearest-neighbor factoring implementations. Our circuit results in an exponential improvement in nearest-neighbor circuit depth at the cost of a polynomial increase in circuit size and width.