Fast address lookups using controlled prefix expansion
ACM Transactions on Computer Systems (TOCS)
Efficient construction of multibit tries for IP lookup
IEEE/ACM Transactions on Networking (TON)
Tree bitmap: hardware/software IP lookups with incremental updates
ACM SIGCOMM Computer Communication Review
Fast incremental updates for pipelined forwarding engines
IEEE/ACM Transactions on Networking (TON)
Non-random generator for IPv6 tables
HOTI '04 Proceedings of the High Performance Interconnects, 2004. on Proceedings. 12th Annual IEEE Symposium
Dynamic Tree Bitmap for IP Lookup and Update
ICN '07 Proceedings of the Sixth International Conference on Networking
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA
FCCM '08 Proceedings of the 2008 16th International Symposium on Field-Programmable Custom Computing Machines
Research on Multi Next Hop RIP
IFITA '09 Proceedings of the 2009 International Forum on Information Technology and Applications - Volume 01
PacketShader: a GPU-accelerated software router
Proceedings of the ACM SIGCOMM 2010 conference
IP routing processing with graphic processors
Proceedings of the Conference on Design, Automation and Test in Europe
Hermes: an integrated CPU/GPU microarchitecture for IP routing
Proceedings of the 48th Design Automation Conference
SMALTA: practical and near-optimal FIB aggregation
Proceedings of the Seventh COnference on emerging Networking EXperiments and Technologies
Survey and taxonomy of IP address lookup algorithms
IEEE Network: The Magazine of Global Internetworking
A safe, efficient update protocol for openflow networks
Proceedings of the first workshop on Hot topics in software defined networks
Wire speed name lookup: a GPU-based approach
nsdi'13 Proceedings of the 10th USENIX conference on Networked Systems Design and Implementation
A memory-efficient parallel routing lookup model with fast updates
Computer Communications
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Recently, the Graphics Processing Unit (GPU) has been proved to be an exciting new platform for software routers, providing high throughput and flexibility. However, it is still a challenging task to deploy some core routing functions into GPU-based software routers with anticipatory performance and scalability, such as IP address lookup. Existing solutions have good performance, but their scalability to IPv6 and frequent updates are not so encouraging. In this paper, we investigate GPU's characteristics in parallelism and memory accessing, and then encode a multi-bit trie into a state-jump table. On this basis, a fast and scalable IP lookup engine called GPU-Accelerated Multi-bit Trie (GAMT) has been presented. According to our experiments on real-world routing data, based on the multi-stream pipeline, GAMT enables lookup speeds as high as 1072 and 658 Million Lookups Per Second (MLPS) for IPv4/6 respectively, when performing a 16M traffic under highly frequent updates ($70,000 updates/s). Even using a small batch size, GAMT can still achieve 339 and 240 MLPS respectively, while keeping the average lookup latency below 100 μs. These results show clearly that GAMT makes significant progress on both scalability and performance.