Closed-form expressions for the coupling capacitance of metal fill tiles in VLSI circuits

Authors:
Nikolaos A. Tsatsoulis;Yiorgos I. Bontzios;Michael G. Dimopoulos;Alkis A. Hatzopoulos
Affiliations:
Dept. of Electrical & Computer Eng., Aristotle Univ. of Thessaloniki, Thessaloniki 54124, Greece;Dept. of Electrical & Computer Eng., Aristotle Univ. of Thessaloniki, Thessaloniki 54124, Greece;TIMA Laboratory (CNRS, Grenoble INP, UJF), 46 Avenue Félix Viallet, 38031 Grenoble Cedex, France;Dept. of Electrical & Computer Eng., Aristotle Univ. of Thessaloniki, Thessaloniki 54124, Greece
Venue:
Microelectronics Journal
Year:
2013

Citing 4
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ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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Abstract

A new closed-form formula for the computation of the coupling capacitance of metal tiles is presented in this work. It exploits the analytical solution of the Laplace equations of equivalent studied problems. Comparative results are given with two commercial tools employing the boundary element method (BEM) and the finite element method (FEM). The results show that the capacitance value computed by the proposed formula is in close agreement to the value obtained by the simulators.