Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Managing variability in software architectures
SSR '01 Proceedings of the 2001 symposium on Software reusability: putting software reuse in context
Feature Diagrams and Logics: There and Back Again
SPLC '07 Proceedings of the 11th International Software Product Line Conference
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
Proceedings of the 46th Annual Design Automation Conference
Combined system synthesis and communication architecture exploration for MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Symbolic system synthesis in the presence of stringent real-time constraints
Proceedings of the 48th Design Automation Conference
Experience with Variability Management in Requirement Specifications
SPLC '11 Proceedings of the 2011 15th International Software Product Line Conference
Adding configuration to the choice calculus
Proceedings of the Seventh International Workshop on Variability Modelling of Software-intensive Systems
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In this paper, we propose a graph-based approach for the modeling and efficient analysis of functional variants of a car's electric and electronic (E/E) architecture functionality by combining local technical expert knowledge with global business knowledge. Starting with a variants system specification including a set of task graphs, linear constraints on binary variables are specified for their alternative selection as well as the selection of groups of alternatives called application groups. These constraints may stem from a certain domain knowledge, e.g., entertainment or power train domain, or global constraints. The typically vast space of resulting possible combinations of different selections of alternative behaviors will be termed variant space and those satisfying the set of formulated constraints valid variants. An important result of this paper is that the set of variants, and especially the set of valid variants, do not need to be modeled or stored explicitly but rather implicitly. Nevertheless do we show that using state-of-the-art PB solver techniques, we may determine the set of valid variants very efficiently. Each of these valid variants may subsequently be used as a candidate for design space exploration (DSE) in order to optimize also the mapping of the corresponding task graph functionalities to a final optimized E/E architecture. A real-world case study is provided to demonstrate the capabilities and efficiency of the presented approach on implicit variant modeling and analysis.