System-level synthesis of adaptive computing systems
System-level synthesis of adaptive computing systems
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
SAT-Based Techniques in System Synthesis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Complex task activation schemes in system level performance analysis
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
A retargetable parallel-programming framework for MPSoC
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Daedalus: toward composable multimedia MP-SoC design
Proceedings of the 45th annual Design Automation Conference
Concurrent topology and routing optimization in automotive network integration
Proceedings of the 45th annual Design Automation Conference
System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
Satisfiability Modulo Theories: An Appetizer
Formal Methods: Foundations and Applications
Improving platform-based system synthesis by satisfiability modulo theories solving
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Concurrent architecture and schedule optimization of time-triggered automotive systems
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A satisfiability approach to speed assignment for distributed real-time systems
Proceedings of the Conference on Design, Automation and Test in Europe
Priority assignment for event-triggered systems using mathematical programming
Proceedings of the Conference on Design, Automation and Test in Europe
IVaM: implicit variant modeling and management for automotive embedded systems
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
Diversely enumerating system-level architectures
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Stringent real-time constraints lead to complex search spaces containing only very few or even no valid implementations. Hence, while searching for a valid implementation a substantial amount of time is spent on timing analysis during system synthesis. This paper presents a novel system synthesis approach that efficiently prunes the search space in case real-time constraints are violated. For this purpose, the reason for a constraint violation is analyzed and a deduced encoding removes it permanently from the search space. Thus, the approach is capable of proving both the presence and absence of a correct implementation. The key benefit of the proposed approach stems from its integral support for real-time constraint checking. Its efficiency, however, results from the power of deduction techniques of state-of-the-art Boolean Satisfiability (SAT) solvers. Using a case study from the automotive domain, experiments show that the proposed system synthesis approach is able to find valid implementations where former approaches fail. Moreover, it is up to two orders of magnitude faster compared to a state-of-the-art approach.