Proceedings of the 6th international conference on Information processing in sensor networks
APRON: a cellular processor array simulation and hardware design tool
EURASIP Journal on Advances in Signal Processing - CNN technology for spatiotemporal signal processing
An Ultra-Low-Power Contrast-Based Integrated Camera Node and its Application as a People Counter
AVSS '10 Proceedings of the 2010 7th IEEE International Conference on Advanced Video and Signal Based Surveillance
Mixed signal SIMD processor array vision chip for real-time image processing
Analog Integrated Circuits and Signal Processing
| Hi-index | 0.00 |
Vision sensors based upon pixel-parallel cellular processor arrays offer the unique opportunity to realise high-performance, flexible, low power image processing systems. By virtue of processing on the focal-plane, the energy-demanding requirement to digitize a captured frame's raw pixel data is reduced, with returned data constituting only that which is salient. We describe a stand-alone vision system incorporating a SCAMP-3 vision chip, an FPGA and an ARM Cortex-M3 microcontroller. SCAMP integrated circuits operate as SIMD computers; each pixel incorporating a compact but powerful analogue processor and local memory, with all operations occurring in parallel over the 128x128 array. Algorithms are developed to operate natively upon the focal-plane as far as possible, with additional serial and higher-level operations occurring on the microcontroller. The power consumption of the system is algorithm-dependent. An algorithm developed for loiterer detection at 8fps has been shown to consume an average power of 5.5mW, with a more complex object tracking and counting system consuming 29mW.