The connection machine
Parallel processing in cellular arrays
Parallel processing in cellular arrays
Face and Eye Detection by CNN Algorithms
Journal of VLSI Signal Processing Systems - Special issue on spatiotemporal signal processing with analog CNN visual microprocessors
Stream Processors: Progammability and Efficiency
Queue - DSPs
An eight layer cellular neural network for spatio-temporal image filtering: Research Articles
International Journal of Circuit Theory and Applications - Special Issue on CNN Technology (Part 1)
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
Design of a Massively Parallel Processor
IEEE Transactions on Computers
Larrabee: a many-core x86 architecture for visual computing
ACM SIGGRAPH 2008 papers
Global operations in SIMD cellular processor arrays employing functional asynchronism
ASAP '07 Proceedings of the 2007 IEEE International Conference on Application-Specific Systems, Architectures and Processors
Simple model of spiking neurons
IEEE Transactions on Neural Networks
ICANN'10 Proceedings of the 20th international conference on Artificial neural networks: Part II
Low power high-performance smart camera system based on SCAMP vision sensor
Journal of Systems Architecture: the EUROMICRO Journal
Mixed signal SIMD processor array vision chip for real-time image processing
Analog Integrated Circuits and Signal Processing
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We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.