ASYNC '01 Proceedings of the 7th International Symposium on Asynchronous Circuits and Systems
The Design of an Asynchronous MIPS R3000 Microprocessor
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Slack Matching Asynchronous Designs
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Slack Matching Quasi Delay-Insensitive Circuits
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Leveraging protocol knowledge in slack matching
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
MOUSETRAP: high-speed transition-signaling asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance estimation and slack matching for pipelined asynchronous architectures with choice
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Bottleneck Analysis and Alleviation in Pipelined Systems: A Fast Hierarchical Approach
ASYNC '09 Proceedings of the 2009 15th IEEE Symposium on Asynchronous Circuits and Systems (async 2009)
Proteus: An ASIC Flow for GHz Asynchronous Designs
IEEE Design & Test
Performance Bounds of Asynchronous Circuits with Mode-Based Conditional Behavior
ASYNC '12 Proceedings of the 2012 18th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
An Asynchronous Floating-Point Multiplier
ASYNC '12 Proceedings of the 2012 18th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
An Asynchronous Divider Implementation
ASYNC '12 Proceedings of the 2012 18th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
Reducing Power Consumption of Floating-Point Multiplier via Asynchronous Technique
ICCIS '12 Proceedings of the 2012 Fourth International Conference on Computational and Information Sciences
Deriving Performance Bounds for Conditional Asynchronous Circuits Using Linear Programing
ASYNC '13 Proceedings of the 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems
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This paper addresses the problem of slack matching conditional asynchronous circuits for average-case performance. The behavior of the circuit is modeled using a Markov chain which governs switching between distinct modes of operations with potentially different performance requirements. Given the probability of mode switchings and desired cycle times for each mode, a minimum number of slack-matching buffers is inserted into the circuit such that an upper bound on the overall average cycle time is achieved. The problem is formulated as a Mixed Integer Linear Program and solved through relaxation. Experimental results on a new benchmark of circuits show a significant savings of slack matching buffers compared with the traditional approach and illuminate the type of circuits for which this new formulation is most beneficial.