Techniques and challenges of implementing large scale logic design models in massively parallel fine-grained multiprocessor systems

Authors:
Platon Beletsky;Mike Bershteyn;Alexandre Birguer;Chunkuen Ho;Viktor Salitrennik
Affiliations:
Cadence Design Systems, San Jose, CA;Cadence Design Systems, San Jose, CA;Cadence Design Systems, San Jose, CA;Cadence Design Systems, San Jose, CA;Cadence Design Systems, San Jose, CA
Venue:
Proceedings of the International Conference on Computer-Aided Design
Year:
2013

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Abstract

In this paper, we describe special techniques and challenges of implementing large scale logic design models in massively parallel fine-grained multiprocessor systems. We will examine performance of such systems and the methods for improving it by reducing the redundant evaluations, memory mapping optimizations, partitioning and scheduling.