The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Energy estimation tools for the Palm
Proceedings of the 3rd ACM international workshop on Modeling, analysis and simulation of wireless and mobile systems
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
PAPI Deployment, Evaluation, and Extensions
DOD_UGC '03 Proceedings of the 2003 DoD User Group Conference
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Holistic Debugging -- Enabling Instruction Set Simulation for Software Quality Assurance
MASCOTS '06 Proceedings of the 14th IEEE International Symposium on Modeling, Analysis, and Simulation
QEMU, a fast and portable dynamic translator
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
Fast cycle-approximate instruction set simulation
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
FaCSim: a fast and cycle-accurate architecture simulator for embedded systems
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Introspection of a Java™ virtual machine under simulation
Introspection of a Java™ virtual machine under simulation
Energy-efficient real-time scheduling of multimedia tasks on multi-core processors
Proceedings of the 2010 ACM Symposium on Applied Computing
A High-level Microprocessor Power Modeling Technique Based on Event Signatures
Journal of Signal Processing Systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Virtual Timing Device for Program Performance Analysis
CIT '10 Proceedings of the 2010 10th IEEE International Conference on Computer and Information Technology
CloneCloud: elastic execution between mobile device and cloud
Proceedings of the sixth conference on Computer systems
Full-system analysis and characterization of interactive smartphone applications
IISWC '11 Proceedings of the 2011 IEEE International Symposium on Workload Characterization
Migrating Android Applications to the Cloud
International Journal of Grid and High Performance Computing
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Simulation is a common approach for assisting system design and optimization. For system-wide optimization, energy and computational resources are often the two most critical issues. Monitoring the energy state of each hardware component and measuring the time spent in each state is needed for accurate energy and performance prediction. For software optimization, it is important to profile the energy and the time consumed by each software construct in a realistic operating environment with a proper workload. However, the conventional approaches of simulation often fail to produce satisfying data. First, building a cycle-accurate simulation environment for a complex system, such as an Android smartphone, is difficult and can take a long time. Second, a slow simulation can significantly alter the behavior of multithreaded, I/O-intensive applications and can affect the accuracy of profiles. Third, existing software-based profilers generally do not work on simulators, which makes it difficult for performance analysis of complicated software, for example, Java applications executed by the Dalvik VM in an Android system. To address these aforementioned problems, we proposed and prototyped a framework, called virtual performance analyzer (VPA). VPA takes advantage of an existing emulator or virtual machine monitor to reduce the complexity of building a simulator. VPA allows the user to selectively and incrementally integrate timing models and power models into the emulator with our carefully designed performance/power monitors, tracing facility, and profiling tools to evaluate and analyze the emulated system. The emulated system can perform at different levels of speed to help verify if the profile data are impacted by the emulation speed. Finally, VPA supports existing software-based profiles and enables non-intrusive tracing/profiling by minimizing the probe effect. Our experimental results show that the VPA framework allows users to quickly establish a performance/power evaluation environment and gather useful information to support system design and software optimization for Android smartphones.