The Performance of Spin Lock Alternatives for Shared-Memory Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
A survey of processors with explicit multithreading
ACM Computing Surveys (CSUR)
Slice-balancing H.264 video encoding for improved scalability of multicore decoding
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Evaluation of data-parallel splitting approaches for H.264 decoding
Proceedings of the 6th International Conference on Advances in Mobile Computing and Multimedia
Novel approaches to parallel H.264 decoder on symmetric multicore systems
ICASSP '09 Proceedings of the 2009 IEEE International Conference on Acoustics, Speech and Signal Processing
Parallel Scalability of Video Decoders
Journal of Signal Processing Systems
A scalable parallel H.264 decoder on the cell broadband engine architecture
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Scalability of Macroblock-level Parallelism for H.264 Decoding
ICPADS '09 Proceedings of the 2009 15th International Conference on Parallel and Distributed Systems
Evaluation of parallel H.264 decoding strategies for the Cell Broadband Engine
Proceedings of the 24th ACM International Conference on Supercomputing
Adaptive multithreaded H.264/AVC decoding
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Parallelizing the H.264 decoder on the cell BE architecture
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
A multithreaded multicore system for embedded media processing
Transactions on high-performance embedded architectures and compilers III
A QHD-capable parallel H.264 decoder
Proceedings of the international conference on Supercomputing
Overview of the H.264/AVC video coding standard
IEEE Transactions on Circuits and Systems for Video Technology
Low-complexity transform and quantization in H.264/AVC
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
H.264/AVC baseline profile decoder complexity analysis
IEEE Transactions on Circuits and Systems for Video Technology
An evaluation of parallelization concepts for baseline-profile compliant H.264/AVC decoders
Euro-Par'07 Proceedings of the 13th international Euro-Par conference on Parallel Processing
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The microprocessor industry trend towards many-core architectures introduced the necessity of devising appropriately scalable applications. While implementing software based video decoding, the main challenges are the optimized partitioning of decoder operations, efficient tracking of dependencies and resource synchronization for multiple parallel units. The same applies for hardware implementations of video decoders where monolithic approaches anticipate scalability of the design and reusability of already implemented core components.In this paper, we propose an intermediate data stream format (Meta Format Stream) which is suited for architectural decomposition of video decoding by replacing the conventional monolithic decoder architecture design with a pipelined structure. The Meta Format is forward-oriented and self contained and multistandard capable, so that processing of Meta Streams is independent of the originating bit stream. Our approach does not require special coding settings and is applicable to accelerated decoding of any standards-compliant bit stream. A H.264/AVC multiprocessing proposal is presented as a case study for the potential our our concept. The case study combines coarse grained frame-level parallel decoding of the bit stream with fine-grained macroblock level parallelism in the image processing stage.The proposed H.264 decoder achieved speedup factors of up to 7.6 on an 8 core machine with 2-way SMT. We are reporting actual decoding speeds of up to 150 frames per second in 2160p-resolution.