Fault Tolerance in a Systolic Residue Arithmetic Processor Array
IEEE Transactions on Computers
Error-control coding for computer systems
Error-control coding for computer systems
Error Coding for Arithmetic Processors
Error Coding for Arithmetic Processors
A Systolic Redundant Residue Arithmetic Error Correction Circuit
IEEE Transactions on Computers
Nonprime Memory Systems and Error Correction in Address Translation
IEEE Transactions on Computers
| Hi-index | 14.98 |
Automatic detection and correction of errors in the residue number system involves the conversion of residue representations to integers and base extension. The residue number system is generally restricted to moduli that are pairwise relatively prime. In this paper we consider error detection and correction using a moduli set with common factors. A method to construct a moduli set that leads to simplified error detection and correction is presented. Error detection can now be performed by computing residues in parallel. Error correction does not involve base extension any more. It is also shown that, removing all restrictions on the moduli set, leads to more complex error detection/correction algorithms