A Clustered Failure Model for the Memory Array Reconfiguration Problem
IEEE Transactions on Computers
IEEE Transactions on Computers
Some Prospects for Efficient Fixed Parameter Algorithms
SOFSEM '98 Proceedings of the 25th Conference on Current Trends in Theory and Practice of Informatics: Theory and Practice of Informatics
On Constrained Minimum Vertex Covers of Bipartite Graphs: Improved Algorithms
WG '01 Proceedings of the 27th International Workshop on Graph-Theoretic Concepts in Computer Science
Constrained minimum vertex cover in bipartite graphs: complexity and parameterized algorithms
Journal of Computer and System Sciences - Special issue on Parameterized computation and complexity
TAMC'07 Proceedings of the 4th international conference on Theory and applications of models of computation
An exact algorithm based on chain implication for the Min-CVCB problem
COCOA'07 Proceedings of the 1st international conference on Combinatorial optimization and applications
Hi-index | 14.98 |
This paper lays foundations for an approach to on-chip row/column allocation that exploits certain properties offered by laterally connected networks of simple threshold devices. As a sample application, it is demonstrated how electronic implementations of these networks can be used as the basis for effective memory array repair systems that require little hardware overhead