Modeling and Characterization of the 3rd Order Charge-Pump PLL: a Fully Event-driven Approach
Analog Integrated Circuits and Signal Processing
Early SEU Fault Injection in Digital, Analog and Mixed Signal Circuits: A Global Flow
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Automatic Behavioural Model Calibration for Efficient PLL System Verification
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
An efficient bottom-up extraction approach to build accurate PLL behavioral models for SOC designs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
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