A unified design methodology for CMOS tapered buffers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Energy recovery for the design of high-speed, low-power static RAMs
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Energy-recovery CMOS for highly pipelined DSP designs
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Practical considerations of clock-powered logic
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Hi-index | 0.00 |