Explicit evaluation of short circuit power dissipation for CMOS logic structures
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Analytical Model for the CMOS Short-Circuit Power Dissipation
Integrated Computer-Aided Engineering
Buffer sizing for minimum energy-delay product by using an approximating polynomial
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
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