Explicit evaluation of short circuit power dissipation for CMOS logic structures

Authors:
S. Turgis;N. Azemard;D. Auvergne
Affiliations:
Laboratoire d'Informatique, de Robotique et de, Microélectronique deMontpellier, LIRMM UMR CNRS 9928, University Montpellier II, 161 Rue ADA, 34392 Montpellier, France;Laboratoire d'Informatique, de Robotique et de, Microélectronique deMontpellier, LIRMM UMR CNRS 9928, University Montpellier II, 161 Rue ADA, 34392 Montpellier, France;Laboratoire d'Informatique, de Robotique et de, Microélectronique deMontpellier, LIRMM UMR CNRS 9928, University Montpellier II, 161 Rue ADA, 34392 Montpellier, France
Venue:
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Year:
1995

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