Data descriptors: a compile-time model of data and addressing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Superoptimizer: a look at the smallest program
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
BEG: a generator for efficient back ends
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
BURG: fast optimal instruction selection and tree parsing
ACM SIGPLAN Notices
Precise instruction scheduling without a precise machine model
ACM SIGARCH Computer Architecture News
DCG: an efficient, retargetable dynamic code generation system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
EEL: machine-independent executable editing
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Decompilation of binary programs
Software—Practice & Experience
lmbench: portable tools for performance analysis
ATEC '96 Proceedings of the 1996 annual conference on USENIX Annual Technical Conference
Derive: a tool that automatically reverse-engineers instruction encodings
DYNAMO '00 Proceedings of the ACM SIGPLAN workshop on Dynamic and adaptive compilation and optimization
Proceedings of the 38th annual Design Automation Conference
Automatic derivation of compiler machine descriptions
ACM Transactions on Programming Languages and Systems (TOPLAS)
ICCS '01 Proceedings of the International Conference on Computational Sciences-Part I
Reverse-Engineering Instruction Encodings
Proceedings of the General Track: 2002 USENIX Annual Technical Conference
Intellectual Property Metering
IHW '01 Proceedings of the 4th International Workshop on Information Hiding
HOIST: a system for automatically deriving static analyzers for embedded systems
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Semantically-Smart Disk Systems
FAST '03 Proceedings of the 2nd USENIX Conference on File and Storage Technologies
Automatically generating instruction selectors using declarative machine descriptions
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Semantically-smart disk systems
FAST'03 Proceedings of the 2nd USENIX conference on File and storage technologies
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There are three popular methods for constructing highly retargetable compilers: (1) the compiler emits abstract machine code which is interpreted at run-time, (2) the compiler emits C code which is subsequently compiled to machine code by the native C compiler, or (3) the compiler's code-generator is generated by a back-end generator from a formal machine description produced by the compiler writer.These methods incur high costs at run-time, compile-time, or compiler-construction time, respectively.In this paper we will describe a novel method which promises to significantly reduce the effort required to retarget a compiler to a new architecture, while at the same time producing fast and effective compilers. The basic idea is to use the native C compiler at compiler construction time to discover architectural features of the new architecture. From this information a formal machine description is produced. Given this machine description, a native code-generator can be generated by a back-end generator such as BEG or burg.A prototype Automatic Architecture Discovery Unit has been implemented. The current version is general enough to produce machine descriptions for the integer instruction sets of common RISC and CISC architectures such as the Sun SPARC, Digital Alpha, MIPS, DEC VAX, and Intel x86. The tool is completely automatic and requires minimal input from the user: principally, the user needs to provide the internet address of the target machine and the command-lines by which the C compiler, assembler, and linker are invoked.