Data descriptors: a compile-time model of data and addressing
ACM Transactions on Programming Languages and Systems (TOPLAS)
Superoptimizer: a look at the smallest program
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
BEG: a generator for efficient back ends
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
BURG: fast optimal instruction selection and tree parsing
ACM SIGPLAN Notices
Precise instruction scheduling without a precise machine model
ACM SIGARCH Computer Architecture News
ATOM: a system for building customized program analysis tools
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
DCG: an efficient, retargetable dynamic code generation system
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
EEL: machine-independent executable editing
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Decompilation of binary programs
Software—Practice & Experience
Reverse interpretation + mutation analysis = automatic retargeting
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
A single intermediate language that supports multiple implementations of exceptions
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Derive: a tool that automatically reverse-engineers instruction encodings
DYNAMO '00 Proceedings of the ACM SIGPLAN workshop on Dynamic and adaptive compilation and optimization
Learning of regular expressions by pattern matching
EuroCOLT '95 Proceedings of the Second European Conference on Computational Learning Theory
lmbench: portable tools for performance analysis
ATEC '96 Proceedings of the 1996 annual conference on USENIX Annual Technical Conference
Retargeting JIT Compilers by using C-Compiler Generated Executable Code
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
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We describe a method designed to significantly reduce the effort required to retarget a compiler to a new architecture, while at the same time producing fast and effective compilers. The basic idea is to use the native C compiler at compiler construction time to discover architectural features of the new architecture. From this information a formal machine description is produced. Given this machine description, a native code-generator can be generated by a back-end generator such as BEG or burg. A prototype automatic Architecture Discovery Tool (called ADT) has been implemented. This tool is completely automatic and requires minimal input from the user. Given the Internet address of the target machine and the command-lines by which the native C compiler, assembler, and linker are invoked, ADT will generate a BEG machine specification containing the register set, addressing modes, instruction set, and instruction timings for the architecture. The current version of ADT is general enough to produce machine descriptions for the integer instruction sets of common RISC and CISC architectures such as the Sun SPARC, Digital Alpha, MIPS, DEC VAX, and Intel x86.