From programming language design to computer construction
Communications of the ACM
Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Efficient instruction scheduling for a pipelined architecture
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Superoptimizer: a look at the smallest program
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
An efficient implementation of SELF a dynamically-typed object-oriented language based on prototypes
OOPSLA '89 Conference proceedings on Object-oriented programming systems, languages and applications
A portable interface for on-the-fly instruction space modification
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
CCG: a prototype coagulating code generator
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
The Marion system for retargetable instruction scheduling
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
i860 microprocessor family programmer's reference manual
i860 microprocessor family programmer's reference manual
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
Postpass Code Optimization of Pipeline Constraints
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficient implementation of the smalltalk-80 system
POPL '84 Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Performance of the IPSC/860 Node Architecture
Performance of the IPSC/860 Node Architecture
Reverse interpretation + mutation analysis = automatic retargeting
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Automatic derivation of compiler machine descriptions
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
On the Behaviours Produced by Instruction Sequences under Execution
Fundamenta Informaticae
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A simple technique is presented which allows an optimizing compiler to more precisely compare the performance of alternative instruction sequences on a complex RISC architecture so that the better sequence can be chosen. This technique may be faster than current techniques, and has the advantage that minor modifications to the hardware do not require any changes to the compiler (not even recompilation), and yet have an immediate effect on instruction scheduling decisions.