Theoretical Computer Science
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Formal Methods for Real-Time Computing
Formal Methods for Real-Time Computing
Specifying and Verifying Requirements of Real-Time Systems
IEEE Transactions on Software Engineering
Formal Development of Reactive Systems - Case Study Production Cell
Formal Development of Reactive Systems - Case Study Production Cell
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
PLC-Automata: A New Class of Implementable Real-Time Automata
ARTS '97 Proceedings of the 4th International AMAST Workshop on Real-Time Systems and Concurrent and Distributed Software: Transformation-Based Reactive Systems Development
Correct Real-Time Software for Programmable Logic Controllers
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
Compilation and Synthesis for Real-Time Embedded Controllers
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
Decomposing Real-Time Specifications
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
From the Specification to the Scheduling of Time-Dependent Systems
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Automated Synthesis of Enforcing Mechanisms for Security Properties in a Timed Setting
Electronic Notes in Theoretical Computer Science (ENTCS)
Deciding an interval logic with accumulated durations
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
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This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level design debugging on the `synthesized' RTL designs, but also allows the designer to analyze their dynamic characteristics, such as resource utilization, power consumption, etc., at the algorithmic (source) level. This technology has been proven in the industry as the critical element for successfully designing a microcontroller with 300+ instructions with Matisse, an interactive HLS system. Additionally, we demonstrate the use of this technology for architectural power optimization.