Preserving HDL synthesis hierarchy for cell placement

Authors:
Yu-Wen Tsay;Wen-Jong Fang;Allen C.-H. Wu;Youn-Long Lin
Affiliations:
Department of Computer Science, Tsing Hua University, Hsinchu, Taiwan, 300, Republic of China;Department of Computer Science, Tsing Hua University, Hsinchu, Taiwan, 300, Republic of China;Department of Computer Science, Tsing Hua University, Hsinchu, Taiwan, 300, Republic of China;Department of Computer Science, Tsing Hua University, Hsinchu, Taiwan, 300, Republic of China
Venue:
Proceedings of the 1997 international symposium on Physical design
Year:
1997

Module generation of complex macros for logic-emulation applications

FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Clustering and linear placement

DAC '72 Proceedings of the 9th Design Automation Workshop
A row-based cell placement method that utilizes circuit structural properties

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy

ISPD '98 Proceedings of the 1998 international symposium on Physical design
Classical floorplanning harmful?

ISPD '00 Proceedings of the 2000 international symposium on Physical design
Analyzing System-Level Information’s Correlation to FPGA Placement

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Hi-index	0.00