Transient simulation of lossy interconnect
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
DAC '93 Proceedings of the 30th international Design Automation Conference
Signals & systems (2nd ed.)
Analysis of RC interconnections under ramp input
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Interconnect design for deep submicron ICs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Efficient approximation of the time domain response of lossy coupled transmission line trees
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power characteristics of inductive interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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In this paper, we present a new analytical approach for computing the ramp response of an RLC interconnect line with a pure capacitive load. The approach is based on the two-port representation of the transmission line and accounts for the output resistance of the driver and the line inductance. The results of our analysis are compared with the results of HSPICE simulations demonstrating the high accuracy of our solution under various values of driver, interconnect, and load impedances.