A low power video processor

Authors:
Uzi Zangi;Ran Ginosar
Affiliations:
Zoran Corporation, Advanced Technology Center, Haifa 31024, Israel;VLSI Systems Research Center, Technion--Israel Institute of Technology, Haifa 32000, Israel
Venue:
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Year:
1998

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Abstract

Multiple power saving methods were applied to a video processor for color digital video and still cameras. Architectural level methods failed to save power: asynchronous design, dynamic voltage scaling, bus switching minimization, pipeline stage merging, reduction of switching times and clock gating. However changing the algorithm to work on pixel differences yielded 3-15% power reduction in typical cases.