System-level power optimization: techniques and tools
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DATE '00 Proceedings of the conference on Design, automation and test in Europe
ACM SIGPLAN Notices
Power optimization and management in embedded systems
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Memory management for embedded network applications
Readings in hardware/software co-design
High-level synthesis of distributed logic-memory architectures
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
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In this p ap er we pr esent our novelpower exploration methodolo gy for applic ations with dynamic data types. Our methodolo gy is crucial to obtain effe ctive solutions in an emb edded (HW or SW) processor context. The c ontributionsare twofold. First we define the complete search sp ace for Virtual Memory Management (VMM) mechanisms in a structured way with orthogonal de cision tr eesSe condly we present our systematic methodolo gy for explor ation of the maximal power that takes into account characteristics of the application to he avily prune the search space guiding the choies of a VMM mechanism. Finally we demonstrate for two industrial examples that power can vary consider ably dep ending on the VMM chosen. Moreover these exp eriments show the effe ctiveness of our exploration methodolo gy.