An experimental VLSI Prolog interpreter: preliminary measurements and results

Authors:
P. L. Civera;F. Maddaleno;G. L. Piccinini;M. Zamboni
Affiliations:
Dipartmento di Elettronica, Politecnico di Torino, Italy;Dipartmento di Elettronica, Politecnico di Torino, Italy;Dipartmento di Elettronica, Politecnico di Torino, Italy;Dipartmento di Elettronica, Politecnico di Torino, Italy
Venue:
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Year:
1987

Citing 8
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Abstract

This work presents the preliminary results of a project oriented to the design and VLSI implementation of a Prolog interpreter. Even if the interpretative approach is being considered an inefficient way to execute high level languages when compared to that of compilation, declarative languages with embedded extralogical instructions would require the use of direct execution.Hardware interpreters have two serious problems: execution speed and lack of flexibility. Recent computer architecture and VLSI technology help us to overcome these drawbacks.