Programming in Prolog (2nd ed.)
Programming in Prolog (2nd ed.)
Logic for problem-solving
Perfect hashing functions: a single probe retrieving method for static sets
Communications of the ACM
Microprogram control of a Prolog machine
ACM SIGMICRO Newsletter
Compiling Prolog into microcode: a case study using the NCR/32-000
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
ACM SIGARCH Computer Architecture News
Designing a high performance parallel logic programming system
ACM SIGARCH Computer Architecture News
Coming to grips with a RISC: a report of the progress of the LOW RISC design group
ACM SIGARCH Computer Architecture News
Use of instruction set simulators to evaluate the LOW RISC
ACM SIGARCH Computer Architecture News
Performance studies of a parallel Prolog architecture
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
An experimental VLSI Prolog interpreter: preliminary measurements and results
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
RISCs vs. CISCs for Prolog: a case study
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Performance studies of a Prolog machine architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Unrestricted and-parallel execution of logic programs with dependency directed backtracking
IJCAI'89 Proceedings of the 11th international joint conference on Artificial intelligence - Volume 1
| Hi-index | 0.00 |
The PLM-1 is the first step in the hardware implementation of a heterogeneous MIMD processor for logic programming. This paper describes its ISP architecture, and discusses in detail some of the design decisions relative to its microarchitecture.