RISCs vs. CISCs for Prolog: a case study

  • Authors:
  • Gaetano Borriello;Andrew R. Cherenson;Peter B. Danzig;Michael N. Nelson

  • Affiliations:
  • Univ. of California, Berkeley;Univ. of California, Berkeley;Univ. of California, Berkeley;Univ. of California, Berkeley

  • Venue:
  • ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
  • Year:
  • 1987

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Abstract

This paper compares the performance of executing compiled Prolog code on two different architectures under development at U. C. Berkeley. The first is the PLM, a special-purpose CISC architecture intended as a coprocessor for a host machine. The second is SPUR, a general-purpose RISC architecture that supports tagged data. Fourteen standard benchmark programs were run on both the PLM and SPUR simulators. The compiled code for SPUR was obtained by simple macro-expansion of PLM code generated by the PLM Prolog compiler. The two implementations are compared with regard to static and dynamic program size, execution speed, and memory system performance. On average, the macrocoded SPUR implementation has a static code size 14 times larger than the PLM, executes 16 times more instructions, yet requires only 2.3 times the number of machine cycles (or has the performance of 0.43 PLMs). When memory system performance is taken into account, SPUR is equivalent to 0.29 PLMs. Optimizations of the macro-expanded code and minor architectural changes to SPUR would increase this ratio to 0.53, or 0.60 for the largest benchmarks. Thus a tagged RISC architecture can execute Prolog at least half as fast as a special-purpose CISC architecture for Prolog.