ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
RISCs vs. CISCs for Prolog: a case study
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Simulation of a computer with variable hardware and variable instruction set
ANSS '87 Proceedings of the 20th annual symposium on Simulation
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS)
Data buffer performance for sequential Prolog architectures
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Dynamic RAM for on-chip instruction caches
ACM SIGARCH Computer Architecture News - Special Issue: Architectural Support for Operating Systems
The TI Advanced Scientific Computer
Computer
Efficient macro-code emulation in hardwired pipelined processors
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
Data buffering: run-time versus compile-time support
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Unified management of registers and cache using liveness and cache bypass
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
FLIP-FLOP: a stack-oriented multiprocessing system
SPAA '90 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures
Implementation of a VLSI layout tool on personal computers
SIGSMALL '90 Proceedings of the 1990 ACM SIGSMALL/PC symposium on Small systems
Architectural support for reduced register saving/restoring in single-window register files
ACM Transactions on Computer Systems (TOCS)
FLIP-FLOP: a stack-oriented multiprocessing system
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
FLIP-FLOP: a stack-oriented multiprocessing system
ACM SIGFORTH Newsletter - Special issue: Hardware
Solutions Relating Static and Dynamic Machine Code Measurements
IEEE Transactions on Computers
Processor Architecture and Data Buffering
IEEE Transactions on Computers
Reduced instruction set computers
Communications of the ACM - Special section on computer architecture
Exploiting horizontal and vertical concurrency via the HPSm microprocessor
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Design of a general purpose meta-assembler for parallel processor environment in ISPS
ANSS '89 Proceedings of the 22nd annual symposium on Simulation
A parallel computer based on cube connected cycles for wafer scale integration
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
IEEE Computer Graphics and Applications
Performance Tradeoffs in Multithreaded Processors
IEEE Transactions on Parallel and Distributed Systems
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