A progress report on SPUR: February 1, 1987
ACM SIGARCH Computer Architecture News
Correct memory operation of cache-based multiprocessors
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
RISCs vs. CISCs for Prolog: a case study
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Caching in the Sprite network file system
ACM Transactions on Computer Systems (TOCS)
The Sprite Network Operating System
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Cache performance of operating system and multiprogramming workloads
ACM Transactions on Computer Systems (TOCS)
Parallel processors and systems for algebraic manipulation: current work
ACM SIGSAM Bulletin
A simulation study of two-level caches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Analysis of bus hierarchies for multiprocessors
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
A two-tier memory architecture for high-performance multiprocessor systems
ICS '88 Proceedings of the 2nd international conference on Supercomputing
The runtime environment for Scheme, a Scheme implementation on the 88000
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
The effect of sharing on the cache and bus performance of parallel programs
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
A multiprocessor configuration in accordance with the aspects of physical and systems design
ACM SIGARCH Computer Architecture News
Design of the opportunistic garbage collector
OOPSLA '89 Conference proceedings on Object-oriented programming systems, languages and applications
Evaluating the performance of four snooping cache coherency protocols
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Supporting reference and dirty bits in SPUR's virtual address cache
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Organization and performance of a two-level virtual-real cache hierarchy
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
KCM: a knowledge crunching machine
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Architectural and organizational tradeoffs in the design of the MultiTitan CPU
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Multiple vs. wide shared bus multiprocessors
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Forward semantic: a compiler-assisted instruction fetch method for heavily pipelined processors
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
Area-Time Optimal Adder Design
IEEE Transactions on Computers
Trap architectures for Lisp systems
LFP '90 Proceedings of the 1990 ACM conference on LISP and functional programming
Radix-16 Signed-Digit Division
IEEE Transactions on Computers
Distributed file systems: concepts and examples
ACM Computing Surveys (CSUR)
On the validity of trace-driven simulation for multiprocessors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Simplicity Versus Accuracy in a Model of Cache Coherency Overhead
IEEE Transactions on Computers
A Fast Translation Method for Paging on Top of Segmentation
IEEE Transactions on Computers
Eliminating the address translation bottleneck for physical address cache
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Parallel main memory database system
SAC '92 Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing: technological challenges of the 1990's
A RISC processor architecture with a versatile stack system
ACM SIGARCH Computer Architecture News - Special issue on input/output in parallel computer systems
A Parallel Virtual Machine for Programs Composed of Abstract Data Types
IEEE Transactions on Computers
High-bandwidth address translation for multiple-issue processors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Exploiting horizontal and vertical concurrency via the HPSm microprocessor
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Browsing in chip design database
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A look at several memory management units, TLB-refill mechanisms, and page table organizations
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Atomic heap transactions and fine-grain interrupts
Proceedings of the fourth ACM SIGPLAN international conference on Functional programming
Control flow optimization for supercomputer scalar processing
ICS '89 Proceedings of the 3rd international conference on Supercomputing
Instruction fetch unit for parallel execution of branch instructions
ICS '89 Proceedings of the 3rd international conference on Supercomputing
APRIL: a processor architecture for multiprocessing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
The TLB slice—a low-cost high-speed address translation mechanism
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Verifying a Multiprocessor Cache Controller Using Random Test Generation
IEEE Design & Test
Multiprocessing Extensions in Spur Lisp
IEEE Software
Efficient Instruction Sequencing with Inline Target Insertion
IEEE Transactions on Computers
A Quantitative Evaluation of Cache Types for High-Performance Computer Systems
IEEE Transactions on Computers
The Design of the POSTGRES Storage System
VLDB '87 Proceedings of the 13th International Conference on Very Large Data Bases
An Analysis of Three Transaction Processing Architectures
VLDB '88 Proceedings of the 14th International Conference on Very Large Data Bases
U-cache: a cost-effective solution to synonym problem
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Proceedings of the 5th international symposium on Memory management
An object-aware memory architecture
Science of Computer Programming - Special issue on five perspectives on modern memory management: Systems, hardware and theory
MSYM'93 Proceedings of the 3rd conference on USENIX MACH III Symposium - Volume 1
An object-aware memory architecture
An object-aware memory architecture
Enigma: architectural and operating system support for reducing the impact of address translation
Proceedings of the 24th ACM International Conference on Supercomputing
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