Performance and evaluation of LISP systems
Performance and evaluation of LISP systems
Computer
ORBIT: an optimizing compiler for scheme
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Global register allocation at link time
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
Computer
Architectural tradeoffs in the design of MIPS-X
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Tags and type checking in LISP: hardware and software approaches
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Lisp on a reduced-instruction-set processor: characterization and optimization
Lisp on a reduced-instruction-set processor: characterization and optimization
Reduced instruction set computers
Communications of the ACM - Special section on computer architecture
LISP on a reduced-instruction-set-processor
LFP '86 Proceedings of the 1986 ACM conference on LISP and functional programming
An optimizing compiler for lexically scoped LISP
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Current status of a portable LISP compiler
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
A simple interprocedural register allocation algorithm and its effectiveness for LISP
ACM Transactions on Programming Languages and Systems (TOPLAS)
Code Optimization Across Procedures
Computer
Trap architectures for Lisp systems
LFP '90 Proceedings of the 1990 ACM conference on LISP and functional programming
HARE: an optimizing portable compiler for Scheme
ACM SIGPLAN Notices
A Parallel Virtual Machine for Programs Composed of Abstract Data Types
IEEE Transactions on Computers
Hi-index | 4.14 |
The factors that motivated the choice of a reduced-instruction-set computer (RISC) on which to implement Lisp are examined. Dynamic profiling measurements used to characterise Lisp are reported. The implementation of tags in Lisp and the cost of function calls are discussed. Interprocedural register allocation is examined. Execution results for various benchmarks are presented and discussed.