An experimental VLSI Prolog interpreter: preliminary measurements and results
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Performance studies of a Prolog machine architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
An Efficient Unification Algorithm
ACM Transactions on Programming Languages and Systems (TOPLAS)
Design decisions influencing the microarchitecture for a Prolog machine
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
A Prolog Compiler for the PLM
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A 32-bit coprocessor designed as one VLSI (very large-scale integrated) circuit that is based on microprogrammed architecture is described. The most innovative aspect of this project is the fully dedicated microarchitecture of the execution unit. A detailed analysis was carried out by considering two execution techniques, 'interpreted' and 'compiled', and the computational model and its implementation were simulated to support the final design decisions. A description is given of compiled execution, which was selected for the final design. The simulations trace the actual behavior of the execution model and point out the performance that can be obtained using different architectural solutions. The results permit the selection of an optimal architecture within the technological constraints of VLSI implementations.