On the sequential nature of unification
Journal of Logic Programming
HPSm, a high performance restricted data flow architecture having minimal functionality
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Multiprocessor cache synchronization: issues, innovations, evolution
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Compiling Prolog into microcode: a case study using the NCR/32-000
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
HPS, a new microarchitecture: rationale and introduction
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Critical issues regarding HPS, a high performance microarchitecture
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
The implementation of Prolog via VAX 8600 microcode
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
Run-time generation of HPS microinstructions from a VAX instruction stream
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
A microcode-based environment for noninvasive performance analysis
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
Checkpoint repair for out-of-order execution machines
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Fast temporary storage for serial and parallel execution
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Delay reduction using simulated annealing
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Performance studies of a Prolog machine architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
A hardware unification unit: design and analysis
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Structure of Computers and Computations
Structure of Computers and Computations
A preliminary architecture for a basic data-flow processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Design decisions influencing the microarchitecture for a Prolog machine
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
CEDAR: a large scale multiprocessor
ACM SIGARCH Computer Architecture News
High performance execution of prolog programs based on a static data dependency analysis (and-parallelism, semi-intelligent backtracking)
Parallel unification scheduling in prolog
Parallel unification scheduling in prolog
Pipelined OR-parallelism architecture for parallel execution of Prolog
IEA/AIE '90 Proceedings of the 3rd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 2
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