Pipelined OR-parallelism architecture for parallel execution of Prolog

  • Authors:

  • D. Sarma;C. P. Wu

  • Affiliations:

  • Department of Electrical & Computer Engineering, Rhodes Hall, ML #30, University of Cincinnati, Cincinnati, OH;Department of Electrical & Computer Engineering, Rhodes Hall, ML #30, University of Cincinnati, Cincinnati, OH

  • Venue:
  • IEA/AIE '90 Proceedings of the 3rd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 2
  • Year:
  • 1990

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Abstract

This paper describes a parallel architecture to implement PROLOG. The architecture considered here takes advantage of the OR-parallelism inherent in the language. In usual OR-parallelism architecture, multiprocessors are used to work on a relation of the database at the same time. In the pipeline OR-parallelism, a relation of the database is processed by only one of the multiprocessors at one time. As soon as a solution is found, the resolution goes forward and works on the goal down the goal tree. A hardware model is derived based on the concept and simulation studies were carried out for different numbers of processor configurations. It has been found that from the results of the simulation optimum processor configurations can be derived to meet the cost performance requirements.