AWE macromodels of VLSI interconnect for circuit simulation

Authors:
Seok-Yoon Kim;Nanda Gopal;Lawrence T. Pillage
Affiliations:
Computer Engineering Research Center, The University of Texas at Austin, 2201, Donley Drive, Suite 395, Austin, Texas;Computer Engineering Research Center, The University of Texas at Austin, 2201, Donley Drive, Suite 395, Austin, Texas;Computer Engineering Research Center, The University of Texas at Austin, 2201, Donley Drive, Suite 395, Austin, Texas
Venue:
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Year:
1992

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Abstract