Digital system design and microprocessors
Digital system design and microprocessors
IEEE Transactions on Information Theory
IEEE Transactions on Information Theory
Introduction to algorithms
IEEE Transactions on Computers
Efficient q-ary immutable codes
Discrete Applied Mathematics - Special volume on applied algebra, algebraic algorithms, and error-correcting codes
Design of Balanced and Constant Weight Codes for VLSI Systems
IEEE Transactions on Computers
Efficient m-ary balanced codes
Discrete Applied Mathematics
Codes for Detecting and Correcting Unidirectional Errors
Codes for Detecting and Correcting Unidirectional Errors
Coding Techniques for Digital Recorders
Coding Techniques for Digital Recorders
Design of Efficient Balanced Codes
IEEE Transactions on Computers
Delay-Insensitive Pipelined Communication on Parallel Buses
IEEE Transactions on Computers
Limitations of VLSI implementation of delay-insensitive codes
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Noise Reduction Using Low Weight and Constant Weight Coding Techniques
Noise Reduction Using Low Weight and Constant Weight Coding Techniques
Design of some new efficient balanced codes
IEEE Transactions on Information Theory
Efficient balancing of q-ary sequences with parallel decoding
ISIT'09 Proceedings of the 2009 IEEE international conference on Symposium on Information Theory - Volume 3
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A balanced code with $k$ information bits and $r$ check bits is a binary code of length $n=k+r$ and cardinality $2^k$ such that the number of $1$s in each code word is equal to $\lfloor n/2 \rfloor$. This paper describes the design of efficient balanced codes with parallel encoding and parallel decoding. In this case, since area and delay of such circuits are critical factors, another parameter is introduced in the definition of balanced code: the 驴number of balancing functions used in the code design,驴$p$. Parallel encoding and decoding algorithms independent from the chosen balancing method are given and these can be implemented by a VLSI circuit of size $O(pk)$ and depth $O(\log p)$. This paper also presents a new balancing method: the permutation method, which, for infinitely many values of $k$ (such as, $k=8,10,20,22,32,34,\ldots$) is more efficient than Knuth's complementation method. This new method results in efficient balanced codes with $k$ information bits, $k$ even, $r=2\lfloor k/12\rfloor+2$ check bits and $p=6$ balancing functions. Further, Knuth's complementation method is generalized to obtain efficient code designs for any value of the parameters $k$, $r$, and $p$, provided that $ k \leq 2\sum_{i=0}^m (\matrix{{r}\cr{i}})+ p(r-2m-1) - [(kr+k+r)\bmod2]$, where $m$ is such that $(\matrix{{r}\cr{m-1}})