Systematic Unidirectional Error-Detecting Codes
IEEE Transactions on Computers
IEEE Transactions on Information Theory
Design of Balanced and Constant Weight Codes for VLSI Systems
IEEE Transactions on Computers
Balanced Codes with Parallel Encoding and Decoding
IEEE Transactions on Computers
Intermediacy Prediction for High Speed Berger Code Checkers
Journal of Electronic Testing: Theory and Applications
Some Codes for Correcting and Detecting Unidirectional Byte Errors
IEEE Transactions on Computers
Design of Efficient Error-Correcting Balanced Codes
IEEE Transactions on Computers
Asynchronous Comparison-Based Decoders for Delay-Insensitive Codes
IEEE Transactions on Computers
Limitations of VLSI implementation of delay-insensitive codes
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Design of t-UED/AUED Codes from Berger's AUED Code
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Efficient Encoding and Decoding Schemes for Balanced Codes
IEEE Transactions on Computers
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes"
Journal of Electronic Testing: Theory and Applications
Robust asynchronous implementation of Boolean functions on the basis of duality
ICC'10 Proceedings of the 14th WSEAS international conference on Circuits
An error-correcting unordered code and hardware support for robust asynchronous global communication
Proceedings of the Conference on Design, Automation and Test in Europe
Analyzing the impact of local and global indication on a self-timed system
ECC'11 Proceedings of the 5th European conference on European computing conference
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By extending the results obtained by D. E. Knuth (1986), a parallel unordered coding scheme with 2/sup r/ information bits is described. Balanced codes in which each codeword contains equal amounts of zeros and ones, with r check bits and up to 2/sup r+1/-(r+2) information bits, are constructed. Unordered codes with r check bits and up to 2/sup r/+2/sup r-1/-1 information bits are designed. Codes capable of detecting 2/sup r-1/+(2/sup r//2)-1 unidirectional errors using r check bits are also described. A review of previous work is presented.