Layout design—lessons from the Jedi designer (tutorial session)

Authors:
Susan L. Taylor;Roderic Beresford;Theodore Sabety
Affiliations:
AT&T Bell Laboratories, Murray Hill, NJ;VLSI DESIGN Magazine, Manhasset, NY;Columbia University, New York, NY
Venue:
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Year:
1985

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Abstract

Today there are many tools available that automatically produce IC layouts; however, designers are reluctant to accept the results produced by these programs. This session will explore the underlying assumptions and basic algorithms used in the design and development of these systems and will introduce the approach of the Jedi Designer system. The information presented in this tutorial will provide a basis for evaluating existing and proposed algorithms for placement, routing, and compaction of IC layouts.